The present invention relates to devices for regulating the flow of electric current, and has specific application to the fabrication of these devices in the context of an integrated circuit (xe2x80x9cICxe2x80x9d). More particularly, it relates to a transistor for regulating the flow of electric current having a Schottky-barrier source and/or drain.
One type of field effect transistor (xe2x80x9cFETxe2x80x9d) known in the art, a metal oxide semiconductor field effect transistor (xe2x80x9cMOSFETxe2x80x9d), is shown in FIG. 1. As shown, the MOSFET device 100, typically includes a silicon substrate 110, an impurity doped source 120, and an impurity doped drain 130, separated by a channel region 140. Atop the channel region 140 is a gate insulating layer 150, which typically consists of silicon dioxide. A gate electrode 160, made from electrically conductive material, is located on top of the insulating layer 150. An insulating layer 170 typically surrounds the gate electrode 160. A field oxide 180 electrically isolates devices 100 from one another. When an appropriate voltage Vg is applied to the gate electrode 160, current flows between the source 120 and drain 130 through the channel region 140. This current is referred to as the drive current, or Id.
One consideration in the design of current regulating devices is the charge carrier mobility or ease with which charge carriers (i.e., electrons or holes) travel through the substrate lattice in the channel region 140. From conventional MOSFET theory, drive current scales linearly with carrier mobility. Channel regions 140 that have higher charge carrier mobilities allow charge carriers to travel in less time between the source 120 and the drain 130, and also to dissipate less power in the carrier transport process. This directly results in devices operating at higher speeds and consuming less power. One known technique for increasing the charge carrier mobility of the channel region 140 is to employ a strained substrate. For example, the mobilities of electrons and holes in strained silicon can be enhanced by factors of approximately two and ten respectively, compared to unstrained silicon. (M. V. Fischetti, S. E. Laux, Journal of Applied Physics, vol. 80 no. 4, 15 Aug. 1996, pp. 2234-52.) As a result, MOSFET devices with strained silicon channel regions 140 are expected to demonstrate power and speed performance characteristics superior to conventional, unstrained silicon devices.
Another known substrate used to fabricate MOSFET devices is a silicon-on-insulator (xe2x80x9cSOIxe2x80x9d) substrate. This semiconductor substrate includes a buried oxide layer to reduce source-to-drain leakage currents and parasitic capacitances. The prior art includes fabrication of MOSFET devices on a semiconductor substrate having a strained SOI layer. (B. Metzger, xe2x80x9cSilicon Takes the Strain for RF Applications,xe2x80x9d Compound Semiconductor, vol. 7, no. 7, August 2001; T. Mizuno, xe2x80x9cDesign for Scaled Thin Film Strained-SOI CMOS Devices with Higher Carrier Mobility,xe2x80x9d IEDM Proceedings, December 2002, p. 31.)
Experimental results, however, for MOSFETs having impurity doped sources and drains and strained silicon channels, show that the devices do not fully benefit from the improvement in carrier mobility. For example, in one study, a 70% improvement in electron mobility led to only a 35% improvement in drive current. (K. Rim, S. Koester, M. Hargrove, J. Chu, P. M. Mooney, J. Ott, T. Kanarsky, P. Ronsheim, M. Ieong, A. Grill, H.-S. P. Wong, Proceedings of the 2001 IEEE VLSI Symposium, Kyoto, Japan (2001).) Because drive current scales linearly with mobility, the net improvement of 35% in drive current implies that the effective mobility for electrons only improved 35% for this example.
There is a need in the art for a FET having a strained substrate, demonstrating an improvement in effective mobility, and therefore improvement in drive current closer to that of the improvement in carrier mobility.
The present invention, in one embodiment, is a FET having a Schottky-barrier source and/or drain and a strained semiconductor substrate. In this embodiment, the device includes a strained semiconductor substrate. A source electrode and a drain electrode are in contact with the strained substrate, and at least one of the electrodes forms a Schottky or Schottky-like contact with the substrate. The source and drain electrodes are separated by a channel. An insulating layer is disposed on the strained substrate above the channel. A gate electrode is disposed on the insulating layer.
The present invention, in another embodiment, is a method of fabricating a Schottky-barrier FET on a strained semiconductor substrate. In this embodiment, the method includes providing a strained semiconductor substrate. It further includes providing an electrically insulating layer in contact with the strained substrate. The method further includes providing a gate electrode on the insulating layer such that the substrate on one or more areas proximal to the gate electrode is exposed. The method further includes depositing a thin film of metal and reacting the metal with the exposed strained substrate, such that Schottky or Schottky-like source and drain electrodes are formed on the substrate.
While multiple embodiments are disclosed, still other embodiments of the present invention will become apparent to those skilled in the art from the following detailed description, which shows and describes illustrative embodiments of the invention. As will be realized, the invention is capable of modifications in various obvious aspects, all without departing from the spirit and scope of the present invention. Accordingly, the drawings and detailed description are to be regarded as illustrative in nature and not restrictive.